Field of the Invention
The disclosed technology relates to semiconductor structures, such as transistors, comprising a passivated III-Nitride layer, and a method for manufacturing thereof.
Description of the Related Technology
Semiconductor structures comprising a III-Nitride layer, such as a GaN transistor, can be utilized in high power, high frequency, and high temperature applications. GaN transistors are typically based on the formation of a heterojunction between a GaN region, typically known as the channel layer, and an overlying AlGaN region or layer, typically known as a barrier layer. The formation of a strongly adhering passivation layer on the top surface of the AlGaN region is important to the performance of the structure.
However, the passivation layer can introduce a number of technical problems. For example, a GaN transistor may comprise an AlGaN barrier layer covered by a SiN passivation layer. The transistor may also comprise a gate insulation layer that lies between the AlGaN barrier layer and the transistor's gate to prevent leakage current between the AlGaN barrier and the gate. A variety of deposited dielectric layers can be used to form the gate insulation layer. These deposited gate insulators include AlN, SiN, Al2O3, HfO2, MgO, Gd2O3, Ga2O3, ScO2, SiO2, and/or their combinations. However, depositing the gate insulator generally requires at least one high temperature process step, which can degrade the SiN passivation layer of the AlGaN.
SiN passivation layers formed by PECVD (Plasma-Enhanced Chemical Vapor Deposition) on an AlGaN layer have been found most suitable for passivating an AlGaN barrier layer. PECVD deposited SiN layers are typically deposited at a temperature below 400 degree C. However, PECVD deposited SiN layers may have poor adhesion to the underlying semiconductor layer, and a high temperature process step conducted after the formation of a silicon nitride passivation layer has significant chances of delaminating the SiN passivation layer from the AlGaN layer. In particular, in the exemplary case of the manufacturing of a GaN transistor, great care must be taken if the gate insulator is to be formed after the SiN passivation layer to avoid delaminating the SiN passivation layer from the AlGaN layer, which causes the manufacturing to decrease in yield and degrade in performance.
It is known, for example from ICPS 2012 poster 278 “InAlGaN/AlN GaN-HEMTs with In-Situ SiN Passivation”; or CS MANTECH 2010 page 225 “GaN-on-Si for Power Conversion”, to passivate a III-Nitride layer of a semiconductor structure with a MOCVD (MetalOrganic Chemical Vapour Deposition,) SiN layer that increases the temperature stability of the SiN layer.
Passivation effects of LPCVD (Low Pressure Chemical vapor deposition) SiN on AlGaN/GaN are described for example in: “Growth and passivation of AlGaN/GaN heterostructures” by J. R. Shealy et al in Crystal Growth 250, 2003 page 7-13); and IEEE Transactions on electronic devices vol. 58 no. 1, 2011, page 87-94). A paper in 2012 DRC (page 75-76) “440V AlSiN-Passivated AlGaN/GaN High Electron Mobility Transistor with 40 GHz Bandwidth” reported LPCVD AlSiN passivated AlGaN/GaN HEMTs (although deposited after mesa), followed by Ohmic contacts and then PECVD SiN, and Schottky gates, and 440V Vbd with Lg 0.5 um, and 470V with Lg 1 um (S-G spacing 1 um; G-D spacing 5 um).
However, the inventors have found that GaN transistors' passivated LPCVD or MOCVD SiN layer alone has compromised dynamic performance as compared with PECVD SiN passivation. Therefore, there exists a need for a passivation scheme of a III-N material combining the merits of LPCVD/MOCVD SiN and LPCVD SiN.